000 00383nam a2200145Ia 4500
008 211209s2010 xx 000 0 und d
020 _a9788131732564
041 _aeng
082 _a621.392 CIL
100 _aCILETTI, MICHAEL D
245 _aMODELING SYNTHESIS AND RAPID PROTOTYPING WITH THE VERILOG HDL
250 _a2 ed.
260 _aNEW DELHI
_bPEARSON
_c2010
300 _a7&7
999 _c83039
_d83039